Temperature compensated subthreshold CMOS voltage references for ultra low power applications

Abstract

This work proposes novel temperature-compensated subthreshold voltage references for ultra-low power and ultra-low voltage applications. The core of the proposed circuits is the self-cascode MOSFET (SCM) since it can operate at very low current levels. To reduce the power consumption, self-biasing and zero-VT leakage biasing schemes are exploited. This resulted in three main structures: a self-biased SCM (SBSCM), a self-biased NMOS load (SBNMOS) and a 3-Transistor (3T) voltage references. For the self-biased structures, the reference voltage generation is achieved by using the SCM with different threshold voltages. Even though these solutions present good performance and low power consumption, the usage of different VT transistors makes the circuits too sensitive to process variations. To obtain a temperature-compensated voltage reference using the same type of device, we use the reverse short-channel and narrow-width effects of the MOS transistor, where VT is larger for short/narrow-channel devices. The proposed self-biased circuits were fabricated in 0.18-μm fabrication process while the 3T voltage references were implemented in 0.13-μm process. Measurement results for 24 samples show that the proposed self-biased circuits can operate at 0.45-0.6 V minimum supply voltages, consuming merely 54.8 and 184 pW at room temperature. Without trimming, from 0 to 120 oC the circuits presented a temperature coefficient of 104 and 495 ppm/oC, while after trimming this values were reduced to 72.4 and 11.6 ppm/oC, respectively. Four versions of the 3T voltage reference were designed. Their post-layout simulation results showed an average voltage reference from sub-kT/q to tens of mV, with a minimum supply voltage of 0.12-0.4 V while operating at power consumption range of fW to pW at 27 oC. The occupied silicon area of all the proposed circuits is less than 0.002 mm2. The ultra-low power and ultra-low voltage operation of the proposed circuits make them suitable for extreme power constrained applications.