Navegação Microeletrônica por Assunto "TLP"
Resultados 1-1 de 1
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Collaborative aware CPU thread throttling and FPGA HLS versioning
(2022) [Dissertação]Warehouses and Cloud Servers have been adopting collaborative CPU-GPU and CPU FPGA architectures as alternatives to enable extra acceleration for applications by parti tioning threads/kernels execution across both devices. ...