Navegação Microeletrônica por Assunto "Photolithography"
Resultados 1-1 de 1
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SAT based environment for logical capacity evaluation of via configurable block templates
(2016) [Tese]Structured ASICs with regular layouts comprise a design-based solution for IC manufacturing yield loss in nanometer technologies caused by photolithography distortions. Via-configurable structured ASICs is even a more ...
