Navegação por Assunto "Full Adder"

Resultados 1-2 de 2

    • Evaluation of variability using schmitt trigger on full adders layout 

      Moraes, Leonardo Barlette de (2018) [Trabalho de conclusão de graduação]
      The aggressive technology and voltage scaling which CMOS-based modern digital circuits are facing introduce challenges as short-channel effects, higher radiation and variability impact. As CMOS technology approaches its ...

    • Variability and voltage scaling aware FinFET design 

      Moraes, Leonardo Barlette de (2020) [Dissertação]
      Technology scaling alongside the increasing process variability impact in modern technology nodes are the main reasons to control deviations over metrics in IC nanometer designs. Also, given the increasing set of devices ...