Listar por autor "Costa, Eduardo Antonio Cesar da"
Mostrando ítems 1-6 de 6
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Approximate and timing-speculative hardware design for high-performance and energy-efficient video processing
(2021) [Tesis]Since the end of transistor scaling in 2-D appeared on the horizon, innovative circuit design paradigms have been on the rise to go beyond the well-established and ultraconservative exact computing. Many compute-intensive ... -
Caracterização da potência dissipada em operadores aritméticos CMOS em lógica pré-difundida
(2000) [Resumen publicado en evento] -
Motion estimation architecture using efficient adder-compressors for HDTV video coding
(2010) [Artículo de periódico]This paper presents real time HDTV (High Definition Television) architecture for Motion Estimation(ME) using efficient adder compressors. The architecture is based on the Quarter Sub-sampledDiamond Search algorithm (QSDS) ... -
Operadores aritméticos de baixo consumo para arquiteturas de circuitos DSP
(2002) [Tesis]Este trabalho tem como foco a aplicação de técnicas de otimização de potência no alto nível de abstração para circuitos CMOS, e em particular no nível arquitetural e de transferência de registrados (Register Transfer Leve ... -
A Simulation-based methodology focused on energy-efficient approximate hardware accelerators design
(2018) [Tesis]The increasing power density and the pervasive use of compute-intensive and power-hungry applications demand energy-efficient CMOS design. This work proposes a systematic simulation-based design flow to explore the integration ... -
Specification and design of an ethernet interface soft ip
(2000) [Artículo de periódico]The IP (Intellectual Property) for Ethernet Interface is a hardware module designed to execute the MAC (media access control) service on the Ethernet standard. The goal of this IP module is to provide an easy way to develop ...
