Browsing by Author "Puget, Julia Casarin"
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Jezz : an effective legalization algorithm for minimum overall displacement
Puget, Julia Casarin (2015) [Work completion of graduation]Legalization is one of the three stages in which logic gate placement is subdivided in the physical synthesis of an integrated circuit. This stage consists of selecting positions considered to be valid for the logic gates, ... -
Sínteses lógica e física para comparação de desempenho entre standard cellsde 350nm comerciais e da ferramenta Astran (UFRGS)
Puget, Julia Casarin; Guimarães Júnior, Daniel Silva (2012) [Abstract published in event] -
UFRGSPlace : a wirelength driven FPGA placement algorithm
Puget, Julia Casarin (2018) [Dissertation]FPGAs are semiconductor devices that can be reprogrammed to reach different application requirements after manufacturing. The architecture of an FPGA can be homogeneous, containing only standard blocks of an FPGA, IOs and ...