Threshold shifting of nmos transitions by arsenic ion implantation prior to gate oxidation

dc.contributor.author	Souza, Joel Pereira de	pt_BR
dc.contributor.author	Charry, E.	pt_BR
dc.date.accessioned	2011-02-15T05:59:08Z	pt_BR
dc.date.issued	1981	pt_BR
dc.identifier.issn	0018-9383	pt_BR
dc.identifier.uri	http://hdl.handle.net/10183/27820	pt_BR
dc.description.abstract	This paper reports on the threshold adjustment of NMOS transistors by arsenic ion implantation in the channel region directly into bare silicon just before the gate oxidation. Experimental results showed very good uniformity and reproducibility of the threshold voltages, low body effect, and high mobility values.	en
dc.format.mimetype	application/pdf	pt_BR
dc.language.iso	eng	pt_BR
dc.relation.ispartof	IEEE Transactions on Electron Devices. New York. Vol. 28, no. 10 (Oct. 1981), p. 1176-1178	pt_BR
dc.rights	Open Access	en
dc.subject	Física da matéria condensada	pt_BR
dc.subject	Implantação de íons	pt_BR
dc.subject	Oxidacao : Silicio	pt_BR
dc.title	Threshold shifting of nmos transitions by arsenic ion implantation prior to gate oxidation	pt_BR
dc.type	Artigo de periódico	pt_BR
dc.identifier.nrb	000143333	pt_BR
dc.type.origin	Estrangeiro	pt_BR

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