Exact lower bound for the number of switches in series to implement a combinational logic cell

dc.contributor.author	Schneider, Felipe Ribeiro	pt_BR
dc.contributor.author	Ribas, Renato Perez	pt_BR
dc.contributor.author	Sapatnekar, Sachin S.	pt_BR
dc.contributor.author	Reis, Andre Inacio	pt_BR
dc.date.accessioned	2007-06-04T15:23:50Z	pt_BR
dc.date.issued	2006	pt_BR
dc.identifier.uri	http://hdl.handle.net/10183/1259	pt_BR
dc.format.mimetype	application/pdf	pt_BR
dc.language.iso	eng	pt_BR
dc.relation.ispartof	South Symposium on Microelectronics (21. : 2006 maio : Porto Alegre). Proceedings. Porto Alegre : Instituto de Informática da UFRGS, 2006.	pt_BR
dc.rights	Open Access	en
dc.subject	Microeletrônica	pt_BR
dc.title	Exact lower bound for the number of switches in series to implement a combinational logic cell	pt_BR
dc.type	Trabalho completo publicado em evento	pt_BR
dc.identifier.nrb	000526563	pt_BR
dc.type.origin	Nacional	pt_BR

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