A design methodology using the inversion coefficient for low-voltage low-power CMOS voltage references

dc.contributor.author	Colombo, Dalton Martini	pt_BR
dc.contributor.author	Fayomi, Christian Jésus B.	pt_BR
dc.contributor.author	Nabki, Frederic	pt_BR
dc.contributor.author	Ferreira, Luiz Fernando	pt_BR
dc.contributor.author	Wirth, Gilson Inacio	pt_BR
dc.contributor.author	Bampi, Sergio	pt_BR
dc.date.accessioned	2023-07-20T03:35:30Z	pt_BR
dc.date.issued	2011	pt_BR
dc.identifier.issn	1807-1953	pt_BR
dc.identifier.uri	http://hdl.handle.net/10183/262428	pt_BR
dc.format.mimetype	application/pdf	pt_BR
dc.language.iso	eng	pt_BR
dc.relation.ispartof	Journal of integrated circuits and systems. Vol. 6, n. 1 (Mar. 2011), p. 7-17	pt_BR
dc.rights	Open Access	en
dc.subject	Transistores	pt_BR
dc.title	A design methodology using the inversion coefficient for low-voltage low-power CMOS voltage references	pt_BR
dc.type	Artigo de periódico	pt_BR
dc.identifier.nrb	000876451	pt_BR
dc.type.origin	Nacional	pt_BR

Este ítem está licenciado en la Creative Commons License