Navegação Teses e Dissertações por Autor "Matos, Jody Maick Araujo de"
Resultados 1-2 de 2
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Graph-based algorithms for transistor count minimization in VLSI circuit EDA tools
Matos, Jody Maick Araujo de (2014) [Dissertação]This master’s thesis introduces a set of graph-based algorithms for obtaining reduced transistor count VLSI circuits using simple cells. These algorithms are mainly focused on minimizing node count in AIG representations ... -
Graph based algorithms to efficiently map VLSI circuits with simple cells
Matos, Jody Maick Araujo de (2018) [Tese]This thesis introduces a set of graph-based algorithms for efficiently mapping VLSI circuits using simple cells. The proposed algorithms are concerned to, first, effectively minimize the number of logic elements implementing ...