Listar por autor "Pilla, Laercio Lima"
Mostrando ítems 1-6 de 6
-
Análise de desempenho da arquitetura CUDA utilizando os NAS parallel benchmarks
(2009) [Tesinas de grado]Processadores gráficos vêm sendo utilizados como aceleradores paralelos para computações de propósito geral (GPGPU), não detidos mais apenas em aplicações gráficas. Isto acontece devido ao custo reduzido e grande potencial ... -
Experimental and analytical study of xeon phi reliability
(2017) [Trabajo completo publicado en evento] -
Exploration of load balancing thresholds to save energy on iterative applications
(2016) [Trabajo completo publicado en evento] -
Hardware-assisted thread and data mapping in hierarchical multi-core architectures
(2016) [Artículo de periódico]The performance and energy efficiency of modern architectures depend on memory locality, which can be improved by thread and data mappings considering the memory access behavior of parallel applications. In this paper, we ... -
A sharing-aware memory management unit for online mapping in multi-core architectures
(2016) [Trabajo completo publicado en evento] -
Topology-aware load balancing for performance portability over parallel high performance systems
(2014) [Tesis]This thesis presents our research to provide performance portability and scalability to complex scientific applications running over hierarchical multicore parallel platforms. Performance portability is said to be attained ...
