Browsing by Subject "Memoria : Computadores"
Now showing items 1-13 of 13
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Communication in shared memory : concepts, definitions, and efficient detection
(2016) [Complete work published in event] -
Data mining the memory access stream to detect anomalous application behavior
(2017) [Complete work published in event] -
A generic processing in memory cycle accurate simulator under hybrid memory cube architecture
(2017) [Dissertation]PIM - a technique which computational elements are added close, or ideally, inside memory devices - was one of the attempts created during the 1990s to try to mitigate the memory wall problem. Nowadays, with the maturation ... -
Hardware-assisted thread and data mapping in hierarchical multi-core architectures
(2016) [Journal article]The performance and energy efficiency of modern architectures depend on memory locality, which can be improved by thread and data mappings considering the memory access behavior of parallel applications. In this paper, we ... -
Improving efficiency of general Purpose computer systems by adopting processing-in-memory architecture
(2020) [Thesis]For decades the inherent limitations of traditional Von Neumann-based computer systems have been overshadowed by the fine-grain architectural advancements and the everincreasing technological evolution. However, in the ... -
Memory performance analysis strategies at runtime level for task-based applications over heterogeneous platforms
(2019) [Dissertation]Programming parallel applications for heterogeneous High Performance Computing platforms is easier when using the task-based programming paradigm, where a Direct Acyclic Graph (DAG) of tasks models the application behavior. ... -
Online thread and data mapping using the memory management unit
(2016) [Thesis]As thread-level parallelism increases in modern architectures due to larger numbers of cores per chip and chips per system, the complexity of their memory hierarchies also increase. Such memory hierarchies include several ... -
PIM-gem5 : a system simulator for Processing-in-Memory design space exploration
(2019) [Dissertation]Processing-in-Memory (PIM) has been recently revisited to address the issues of memory and power wall, mainly due to the maturity of 3D-stacking manufacturing technology and the increasing demand for bandwidth and parallel ... -
Programação dinâmica eficiente com algoritmos Cache-Oblivious
(2008) [Work completion of graduation]A memória nos computadores modernos geralmente está organizada em uma hierarquia complexa. Dessa forma, torna-se importante projetar algoritmos que utilizem a cache de forma eficiente. Além disso, as configurações da memória ... -
Scheduling mechanisms for DRAM memory controllers
(2017) [Work completion of graduation]Over the last decades, the performance disparity between processor and memory has steadily grown in computer systems, an issue commonly known as MemoryWall (WULF; MCKEE, 1995). Since Dynamic Random-Access Memory (DRAM) is ... -
A sharing-aware memory management unit for online mapping in multi-core architectures
(2016) [Complete work published in event] -
SoMMA : a software managed memory architecture for multi-issue processors
(2017) [Dissertation]Processadores embarcados utilizam eficientemente o paralelismo a nível de instrução para atender as necessidades de desempenho e energia em aplicações atuais. Embora a melhoria de performance seja um dos principais objetivos ... -
Týr : a dependent type based code transformation for spatial memory safety in LLVM
(2018) [Dissertation]The C programming language does not enforce spatial memory safety: it does not ensure that memory accessed through a pointer to an object, such as an array, actually belongs to that object. Rather, the programmer is ...